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The integration of a Low Noise Amplifier (LNA) with on-chip antenna for 60 GHz short-range wireless applications is discussed in the paper. A 65 nm CMOS Silicon-on-Insulator (SOI) technology has been selected as target. With respect to the state of the art, the on-chip co-design of LNA and antenna permits avoiding a pre-defined constraint of 50 Ohm impedance matching. By relaxing the impedance matching...
The design and characterization in high-voltage (HV)-CMOS technology of an innovative intelligent power switch (IPS) for harsh automotive applications is proposed in this paper. To safely handle the ordinary and extraordinary automotive electrical and environmental conditions, a systematic design flow is followed: several design solutions are presented at the architectural and circuital level, integrating...
State-of-Charge estimation is one of the most important task of Battery Management Systems in hybrid and electric vehicles. Knowing the amount of charge stored in each cell of the vehicle battery pack is indeed crucial for effective battery utilisation that prevents cells from damaging and extends the battery lifetime. This is even more relevant for lithium batteries that are less tolerant to overcharging...
This work presents a low-complexity physical link micro architecture for a mesochronous on-chip communication insensitive to clock skew. This new link architecture, called LIME, integrates a low-latency flow control scheme; this feature may ease the set up of reliable Network-on-Chip infrastructures. The proposed architecture also supports virtual channels that are multiplexed on a single physical...
One of the key-points in system on chip (SoC) design is to have the proper clock oscillator. Currently the most used are RC and quartz oscillators. They feature different characteristics in terms of performance, power consumption and cost, both oscillators have their own advantages and drawbacks. Sometimes SoC design would benefit to have both solutions in order to best cope with all requirements...
Clock distribution is a major issue when implementing system-on-a-chip in deep sub-micron technologies. This work presents a new mesochronous physical link architecture, named SKIL, which enables full bandwidth communication between macrocells clocked by signals with the same frequency and an arbitrary amount of skew. SKIL is implemented using standard-cells design flows. It introduces two clock cycles...
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