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Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission lines in power grids. The transmission lines are well suited for high quality intra-chip signal transmission at multi gigabit data rates. By having signal lines between the power grids, the VDD and GND lines in the grid can...
As integrated circuit technology enters the nanometer era, global interconnects are becoming a bottleneck for overall chip performance. In this paper, we show that wafer-level package interconnects are an effective alternative to conventional on-chip global wires. These interconnects behave as LC transmission lines and can be exploited for their near speed of light transmission and low attenuation...
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