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The extensive improvement in the VLSI technology results in optimization of various factors, at the same time causing overhead in area, delay etc. Multipliers being the integral part of major application systems like Digital Signal Processor (DSP), Microprocessor and Application Specific Integrated Circuits (ASIC'S) plays a major role in the overall area, power consumption and performance of the processor...
Logging-while-drilling (LWD) and measurement-while-drilling (MWD) applications have prompted the development of acoustic telemetry for retrieving downhole data. In this paper, a multilevel frequency shift keying (ML-FSK) modulation transceiver with pseudo-coherent differential energy detection is proposed and optimized for such acoustic telemetry applications. The motivation of employing the proposed...
A turbo block code (TBC) technique for improving the performance of a multi-carrier code division multiple access (MC-CDMA) system in terms of bit error rate (BER) is proposed in this paper. The objective of this work is to develop a coding scheme that generates low BER code-words. By implementing a time domain TBC, designed using powerful low density parity check (LDPC) code, the BER performance...
A method for representation of floating-point numbers with the help of integers is proposed. Simple mathematical operations involving the former are also defined in the new representation. High level codes developed for fixed-point targets may contain floating point expressions and simple modifications in the code according to the proposed conversions can produce optimized codes consisting of only...
Efficient on-chip communication is very important for exploiting enormous computing power available on a multi-core chip. Network on Chip (NoC) has emerged as a competitive candidate for implementing on-chip communication. Routing algorithms significantly affect the performance of a NoC. Most of the existing NoC architectural proposals advocate distributed routing algorithms for building NoC platforms...
Recently macroblock based technique for backward playback of MPEG video streaming has been discussed in which the network bandwidth and buffer size requirements are less. In this technique, the macroblocks are divided into two categories backward macroblock (BMB) and forward/backward macroblock (FBMB) based upon their motion characteristics. In this paper, we propose a new method in which the network...
Bit plane coding (BPC) constitutes an important component of the EBCOT Tier-1 block of JPEG2000 encoder. This paper proposes an efficient parallel hardware structure to implement the computation intensive word level bit plane coding algorithm. The proposed architecture computes the context and decision for all bit planes in parallel. The three coding passes are merged for all bit planes in a scan...
This paper presents a distributed source coding scheme for two correlated image data using Log-MAP and SOVA decoders. Both decoderspsila peak signal to noise ratio (PSNR) performance has been studied in symmetric as well as asymmetric turbo codes environment. Turbo codes are promising for distributed source coding (DSC) because of their simple encoding implementation and impressive decoding performance...
In this paper, the problem of obtaining calibration parameters for a stereo camera system is considered. A real coded genetic algorithm is used to solve this problem. The solution of extrinsic and intrinsic parameters of the left and right cameras are encoded in the vectors of real numbers. The Laplace crossover and power mutation operators are used to obtain next generation of the solutions. The...
The automatic simultaneous search of structure and parameters in fuzzy-neural networks is a pressing research problem. This paper introduces a novel and powerful variable-length-crossover differential evolution algorithm, vlX-DE, which is applied to ASuPFuNIS fuzzy-neural model learning, and permits simultaneous evolution of mixed-length populations of strings representing ASuPFuNIS network instances...
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