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This paper proposes to represent the floating-point multipliers required to perform IDCT implementations using a rational Diophantine (i.e. ratio of integers) approximation with a common denominator, which is not necessarily a power of two. A case study to support this proposal is presented by applying the proposed scheme to Chenpsilas IDCT algorithm. Results show better performance when applying...
Hardware/software codesign is a rapidly-growing research area branching from hardware synthesis. The purpose of codesign is to facilitate the design of small embedded systems, that is, those consisting of a microprocessor, for which software is required, in addition to one or more semi-custom ASICs or FPGAs. In this paper, a design flow of an H.264 HW/SW digital video encoder is introduced. A design...
H.264/AVC is the newest international video coding standard. The standard uses a new DCT-like integer transform (Int-DCT) which is an integer orthogonal approximation to the classical DCT. The objective of using integer coefficients is to provide a completely reversible transform and also reduce the implementation complexity. The main disadvantage is that it increases the quantizer complexity and,...
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