The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Optimized solvers for the Boolean satisfiability problem have many applications in areas such as FPGA routing, planning, and so forth. In the context of FPGA routing where routing resources are fixed, Boolean formulation methods can prove the unroutability of a given circuit, which is a clear advantage over classical net-at-a-time approaches. This paper introduces a new and efficient hybrid routing...
In this paper, we propose a new and efficient hybrid Routing algorithm for FPGAs by integrating a Boolean satisfiability algorithm with geometric routing algorithm. It takes advantage of the rip-up-reroute capabilities of the conventional geometric routing algorithm and simultaneous net embedding characteristic of Boolean SAT-based FPGA routing. Experiment results show that compared with the corresponding...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.