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A WR1.5 frequency multiplier circuit using standard CMOS 65nm technology is presented. Careful choice of device and its gate size leads to fair amount of output power compared to other expensive high performance semiconductor process. Accumulation-mode varactor device is chosen for its high non-linearity and gate size of the varactor is enlarged until self-resonance occur at fundamental frequency...
A 300 GHz amplifier is fabricated using indium-phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology. The cascade chain in the amplifier contains six unit cells each containing a pair of common-base DHBTs in differential configuration. A total of three signal lines run through to the unit-cell to obtain the differential-mode amplifier gain and provide proper dc bias. Measured...
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