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This paper presents a novel calibration technique for charge redistribution digital-to-analog converters (DACs). By using the proposed clock-pulse-width calibration, the clock of the DAC is modulated, and the output voltage is effectively modified to enhance the differential-non-linearity (DNL) and integral-non-linearity (INL). By using this method, the measured DNL, and INL have been improved by...
This paper presents a 10-channel time-of-flight application-specific integrated circuit (ASIC) for positron emission tomography in a 90 nm standard CMOS process. To overcome variations in channel-to-channel timing resolution caused by mismatch and process variations, adaptive biases and a digital-to-analog converter (DAC) are utilized. The main contributions of this work are as follows. First, multistage...
A 10-channel time-of-flight (TOF) positron emission tomography (PET) IC that uses a digital-to-analog (DAC) — based architecture is implemented in 90nm CMOS process. The DAC is used to compensate for timing resolution variation attributed to amplifier gain fluctuation. Mixed-signal reset signals enhance photon counting speed achieving 5M counts/s/ch. The IC uses adaptive biases to stabilize the gain...
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