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In this paper, the authors present the design and VLSI implementation of a low-power bitstream controller for H.264/AVC baseline profile decoding. It is comprised of bitstream parsing and three dedicated decoders for intra-prediction mode, inter-motion vector and boundary strength. Various low-power design techniques, such as statistic-based data driven decoding, hierarchical FSM decomposition, nonuniform...
In this paper, a CMOS low noise amplifier (LNA) employing the switched-capacitors is proposed to perform multi-band tuning for an MB-OFDM ultra-wideband (UWB) hopping system. By using the fully differential topology, the switching noise generated during each frequency transition interval is greatly suppressed. The proposed UWB LNA is implemented in a standard 0.18-mum CMOS process. The simulation...
This paper presents a fully differential OTA with a supply of 0.5V in a 0.18mum CMOS process that has threshold voltages of 0.5V under zero body-source biasing. Unlike a recent two-stage 0.5V OTA architecture, this OTA employs two common mode feedback loops for obtaining a stable operating condition and thus a robust performance against process variations. Body terminals of the input differential...
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