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In this paper, the dividing ratio changeable digital phase locked loop (DCPLL) using the VCO as the base clock source is proposed. In this circuit, the ratio of output jitter is not greatly influenced for the input signal. Also, the lock-in range can be widely compared with the conventional method.
CMOS technology is being advanced rapidly and applications are now expanding into the millimeter-wave regime on a global basis. 60 GHz wireless systems in CMOS have already been reported. In addition, 77 GHz automotive radar is becoming the target for CMOS technology. This paper describes what is believed to be the first transceiver chip for 77 GHz radar in standard 90 nm CMOS.
We have developed a 27- and 40-GHz tuned amplifier and a 52.5-GHz voltage-controlled oscillator using 0.18-mum CMOS. The line-reflect-line calibrations with a microstrip-line structure, consisting of metal1 and metal6, was quite effective to extract the accurate S-parameters for the intrinsic transistor on an Si substrate and realized the precise design. Using this technique, we obtained a 17-dB gain...
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