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Improvement of current drive in n- and p-type silicon junctionless MOSFETs using strain is demonstrated. The extracted piezoresistance coefficients are in good agreement with the piezoresistive theory and the published coefficients for bulk silicon even for 10 nm-thick silicon nanowires as narrow as 20 nm.
The results are reported of an experimental study of the hot carrier (HC) and bias-temperature-instability (BTI) reliability of MuGFETS, fabricated on SOI wafers with silicon oxide and silicon nitride buried layers. N- and P-channel devices of 65 nm long and 42 nm or 32 nm wide channels were stressed and measured at room temperature and at 125degC. A complicated picture emerges: HC degradation is...
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