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Recent high-speed digital-to-analogue converters (DACs) cannot be easily characterised at their highest rate because of the very high cost of commercially available bit-error rate testers at the required DACs rate. Among possible solutions, an inexpensive approach is the use of a multiplexer (MUX) with built-in memory to provide the required bit stream for one input bit of the DAC. This work presents...
A 6 bit and a 7 bit successive approximation register (SAR) analog-to-digital converter (ADC) with conversion rates of up to 80 MS/s are presented in this paper. They will be used in an impulse-radio ultra-wideband (IR-UWB) receiver. The architecture with a switched-capacitor (SC) digital-to-analog converter (DAC) is applied due to its low power consumption. The 6 bit analog-to-digital converter applies...
This paper presents a frequency divider with a programmable division ratio between 208 and 320 intended for the standard IEEE 802.15.4a. The divider is based on high speed, low power, triple modulus prescalers. The wide division range is achieved by cascading these programmable prescalers. Each prescaler includes a phase selector and an ECL D-flip-flop which acts as a divider by 2. The triple operation...
This paper presents a fully differential baseband pulse generator intended for Impulse-Radio Ultra-Wideband (IR-UWB) direct up-conversion transmitter architectures. The generator provides impulse related binary phase shift keying (BPSK) and on/off keying (OOK) modulation in accordance with the IEEE 802.15.4a standard. The logic part of the generator runs on a clock of 499.2 MHz allowing direct generation...
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