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Recent high-speed digital-to-analogue converters (DACs) cannot be easily characterised at their highest rate because of the very high cost of commercially available bit-error rate testers at the required DACs rate. Among possible solutions, an inexpensive approach is the use of a multiplexer (MUX) with built-in memory to provide the required bit stream for one input bit of the DAC. This work presents...
This paper presents a frequency divider with a programmable division ratio between 208 and 320 intended for the standard IEEE 802.15.4a. The divider is based on high speed, low power, triple modulus prescalers. The wide division range is achieved by cascading these programmable prescalers. Each prescaler includes a phase selector and an ECL D-flip-flop which acts as a divider by 2. The triple operation...
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