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ABSTRACT This paper presents a fully integrated low cost, low noise 10GHz synthesizer using 65nm RF CMOS process. The synthesizer provide low phase-noise and low reference spur, covering 8.3GHz to 11.3GHz using multiband low gain VCO with auto calibration for locking. The measured phase-noise of 9.75GHz is −77dBc/Hz at lKHz offset, −90.1dBc/Hz at 10KHz offset, −98.6dBc/Hz at 100KHz offset, and −112...
This paper presents the design, implementation and test results of Burst Mode Receiver (BMRx) for Gigabit Passive Optical Networks (GPON) at 2.488 Gb/s. Unlike the continuous mode transceivers Optoelectronic Integrated Circuit (OEIC), development of BMRx is challenging since the widely varying amplitude and phase of the received bursts have to be recovered consuming minimum overhead in terms of bits...
A highly integrated UHF RFID reader IC in 0.18-m CMOS process covering the entire 860 MHz to 960 MHz RFID band supporting the EPCglobaltrade Class-1 Generation-2 and ISO-18000-6A/B/C standards is presented. The IC features a transmitter with an output of 10 dBm and a receiver with sensitivity of 96 dBm in listen-before-talk mode (LBT) and 85 dBm in talk-mode. Direct-conversion architecture is used...
A fully differential CDR circuit realized in 0.18-mum CMOS technology targeted for the ONU in GPON applications at 2.5 Gb/s is presented. The CDR demonstrates very low RMS jitter of 1.4 psec, along with a acquisition range of 220 MHz employing a simple PLL architecture without a need for any frequency acquisition aid or external reference. The LC VCO employs complementary varactor structure for differential...
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