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This paper presents a simple analytical reliability model for potential and threshold voltage when negative bias temperature instability (NBTI) and hot carrier degradation (HCD) are included in double gate (DG) PMOS. The work is based on solving 2D Poisson equation for undoped DG PMOS. The effect of both reliability concerns on drain induced barrier lowering (DIBL) and threshold voltage roll-off is...
In this paper, a 2D compact model for potential and threshold voltage for lightly doped symmetrical double gate (DG) p-channel MOSFETs (PMOS) including negative bias temperature instability (NBTI) and short channel effects (SCEs) is presented. The model is dedicated to nano scale MOSFETs below 30nm. In this model, both effects of interface state generation and hole-trapping are considered. Moreover,...
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