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We introduce a novel multimode-interference-based plasmonic phase adjuster, which simplifies cascaded photonic-integrated-circuit (PIC) patterns. A cascaded plasmonic half-adder circuit that includes the proposed phase adjuster is demonstrated using scanning near-field optical microscopy. The proposed phase adjuster will be indispensable for future PIC technologies.
We propose a circuit technique for an 8T dual-port (DP) SRAM in order to screen degraded minimum operating voltage (Vmin) due to the write/read disturb issue. This circuitry allows us to generate the write/read disturb condition without relying on the conventional costly asynchronous operation. We designed and fabricated a 512-kb DP-SRAM macro using 28-nm low-power CMOS technology, and confirmed assured...
We have been developing wireless communication technologies for industrial applications. In industrial plants, there are many radio obstacles such as metal pipes and walls. Even in the severe environment, wireless communication has to be reliable and time has to be scheduled to maintain plant stability. For easy-to-use management, features of ad-hoc construction and low power management are also required...
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