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The effect of asymmetry tilt angle ion implantation on polysilicon thin-film transistors (TFTs) device characteristics are investigated. This asymmetric source/drain (S/D) TFTs structure exhibits low leakage current and suppressed kink effect due to the relief of higher electric field near the drain junction side. It is shown that the optimal implantation tilt angle is 30° in our annealing condition...
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