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Floorplanning is an important step in the physical design of VLSI circuits. Since the variety of packing is uncountable, it is hard to be solved exactly in practical applications. The key issue is how to find the optimal solution in the finite solution space. In this paper, we proposed hybrid algorithm which based on B*-tree representation to improve the area utilization. The simulated annealing was...
The increasing power consumption levels of integrated circuits (ICs) have become a major concern of the semiconductor industry. Excessive power dissipation causes overheating, which can lead to soft errors or permanent damage. It also limits battery life in portable equipments. High power consumption can be reduced by properly increasing area. However, arbitrarily large area, namely high number of...
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