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Demand for use of FPGAs in space is increasing to support hardware repair and hardware update functions in addition to software repair and update functions in spacecraft, satellites, space stations, and other applications. Under a space radiation environment, embedded devices must allow for incidence of high-energy charged particles. Such incidence can cause single or multi-event latch-up (S/MEL)-associated...
To date, optically reconfigurable gate arrays (ORGAs) have been developed to realize large virtual gates and to increase gate array performance by combining a holographic memory with a programmable gate array. Among such studies, a 16-context ORGA architecture with nanosecond-order reconfiguration capability has already been demonstrated. However, its reconfiguration contexts are too few to execute...
An internet booster (IB) based on a networked hw/sw complex system is presented. The key-idea of IB is obtaining relevant WEB applications virtual hardware circuit through internet; just as same as downloading general WEB applications specific software from the server. The downloaded virtual hardware circuit is realized into an FPGA and cooperates with server's application which is also constructed...
High-reliability, high repetition rate and compactness of pulsed power generators have been required for spreading industrial applications. The control of pulsed power generator becomes more complicated with the increase of functions. An all solid state pulsed power generator can be easily controlled by using a field programmable gate array (FPGA). The pulsed power generator is consisted of a controller,...
Majority voting is a commonly used approach to increase system reliability. Standard triple-module-redundancy (TMR) methods are frequently used in space applications. Using these methods, triple modules and voting circuits are implemented onto an application specific integrated circuit (ASIC) or an FPGA. When a single event upset occurs, the voting circuit neglects the failure value of a module receiving...
An optically reconfigurable gate array (ORGA) is a type of field programmable gate array (FPGA) that can be reconfigured optically in a very short time and with many reconfiguration contexts by combining a holographic memory and a laser array on a gate-array VLSI. An ORGA can be considered as a type of next-generation three-dimensional (3D) VLSI chip. The developments of high-gate count ORGA-VLSIs,...
An SRC, sampling rate converter, consisting of conventional filter-type SRC and time-domain SRC using Fourier interpolation algorithm is proposed. Filter portion realizes over-sampling, and its output is interpolated by the Fourier portion. The SRC achieves noise level of as low as -110dB for all frequencies, and its gate count is about 1000000 FPGA logic cells
New time-domain SRC using Fourier interpolation to achieve less gate count than in frequency domain is proposed and implemented by FPGA. Layout area of the proposed SRC based on a 0.35/spl mu/m process is 5.728mm/sup 2/, smaller than the conventional SRC using filters. The noise level is reduced down to the quantization error level by using several improving methods.
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