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We have designed three ASICs for possible applications in a new pixel layer (insertable B-layer or IBL) for the ATLAS detector for the first phase of the LHC luminosity upgrade. The ASICs are a high-speed driver for the vertical-cavity surface-emitting laser (VCSEL), a receiver/decoder to decode the signal received at the PIN diode to extract the data and clock, and a clock multiplier to produce a...
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