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In this paper, we identify the unique challenges in deploying parallelism on TCAM-based pattern matching for Network Intrusion Detection Systems (NIDSes). We resolve two critical issues when designing scalable parallelism specifically for pattern matching modules: 1) how to enable fine-grained parallelism in pursuit of effective load balancing and desirable speedup simultaneously; and 2) how to reconcile...
In this paper, we aim at analyzing how effective the caching technique is, in dealing with real-time packet processing through simulation studies. First of all, we introduce a fast multithreaded processor simulator. The simulator is applied to emulate the basic IP forwarding using Intel IXP1200 with the addition of caching. Our simulation results indicate that overall, caching can be an effective...
To allow fast communication processor (CP) performance testing of task-to-CP-topology mapping, we propose a fast CP simulation tool with a few novel ideas that make it generic, fast, and accurate. Our major goal is to focus on modeling features common to a wide variety of CP architectures and incorporate relevant CP specific features as plug-ins. This tool not only allows user-defined packet arrival...
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