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In this work we provide a compelling experimental and theoretical explanation for the low GIDL currents that occur due to band to band (b2b) tunneling in MOSFETs with [100] (45?? rotated) channel direction compared to [110] oriented devices. In measurements on bulk Si wafers, we clearly show a factor of ~3?? decrease in tunneling current for (001) wafers compared to (011) or (111) wafers supporting...
A reliability evaluation of a 300-mm-compatible 3DI process is presented. The structure has tungsten through-Si-vias (TSVs), a hybrid Cu/adhesive bonding interface, and a post Si-thinning Cu BEOL. The interface bonding strength, deep thermal cycles test, temperature and humidity test, and ambient permeation oxidation all show favorable results, indicating the suitability of this technology for VLSI...
A 300-mm wafer-level three-dimensional integration (3DI) process using tungsten (W) through-silicon vias (TSVs) and hybrid Cu/adhesive wafer bonding is demonstrated. The W TSVs have fine pitch (5 mum), small critical dimension (1.5 mum), and high aspect ratio (17:1). A hybrid Cu/adhesive bonding approach, also called transfer-join (TJ) method, is used to interconnect the TSVs to a Cu BEOL in a bottom...
Novel silicon-on-insulator (SOI) structures are presented on hybrid orientation substrates (SuperHOT), i.e. with nFETs on (100) surface orientation and pFETs on (110) orientation, using silicon lateral overgrowth. Functional SOI MOSFETs and ring oscillators are demonstrated
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