The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper proposes a new method based on fuzzy logic theory to adjust the pulse width of PWM (Pulse Width Modulation) control in digital redesign and to implement it by FPGA (Field Programmable Gate Array) chip. The GA (Genetic Algorithm) is utilized to adjust the parameters of fuzzy logical system such that output response of controlled hybrid system closely matches with that of analog system.
With the increasing NRE cost of advanced process technologies, reconfigurable devices receive great attention in small and medium volume IC designs. However, lower logic utilization and slower timing performance limit the efficacy of FPGA and CPLD. In this paper, we propose an efficient hybrid LUT/SOP reconfigurable design style to exploit both the advantages of LUT-cell and SOP-cell for circuit design...
In the routing architecture of a structured ASIC, crossbar is one of the most area efficient switch blocks. Nevertheless, dangling-wire occurs when there is a routing bend in crossbar switch. The dangling-wire incurs longer wire length as well as higher interconnection capacitance. In this paper, we are motivated to tackle dangling-wire routing issues for structured ASIC. We first propose a compact...
In this paper, an efficient and flexible SoC platform integrated with intellectual property (IP) cores for multiinput multi-output orthogonal frequency division multiple access (MIMO-OFDMA) transceiver of IEEE802.16e-2005 standard is presented. The proposed platform supports uplink/downlink and is integrated with the evaluation system. The hardware and software design have been synthesized and verified...
In this paper, an efficient advanced RISC machine (ARM)-based system-on-chip (SoC) testbed for a multi-input multi-output orthogonal frequency division multiple access (MIMO-OFDMA) uplink transceiver is presented. To mitigate carrier frequency offset (CFO) and multipath channel impairments, low complexity architecture of an inter-carrier interference (ICI)-cancellation-based CFO estimator and a 2D...
In recent years, pre-fabricated design styles grow up rapidly to amortize the mask cost. However, the interconnection delay of the pre-fabricated design styles slows down the circuit performance due to the high capacitive load. In this paper, we propose a technique to insert dual-rail wires for pre-fabricated design styles. Furthermore, we propose an effective dual-rail insertion algorithm to reduce...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.