Serwis Infona wykorzystuje pliki cookies (ciasteczka). Są to wartości tekstowe, zapamiętywane przez przeglądarkę na urządzeniu użytkownika. Nasz serwis ma dostęp do tych wartości oraz wykorzystuje je do zapamiętania danych dotyczących użytkownika, takich jak np. ustawienia (typu widok ekranu, wybór języka interfejsu), zapamiętanie zalogowania. Korzystanie z serwisu Infona oznacza zgodę na zapis informacji i ich wykorzystanie dla celów korzytania z serwisu. Więcej informacji można znaleźć w Polityce prywatności oraz Regulaminie serwisu. Zamknięcie tego okienka potwierdza zapoznanie się z informacją o plikach cookies, akceptację polityki prywatności i regulaminu oraz sposobu wykorzystywania plików cookies w serwisie. Możesz zmienić ustawienia obsługi cookies w swojej przeglądarce.
The stress sensing system, which has been developed recently, allows measuring the magnitudes and the distribution of mechanical stresses induced in the silicon dies during fabrication and testing of the electronic packages. The studies already presented in the last years focused on the effects of temperature cycling, 4-point-bending, moisture swelling, and molding. This paper reports the results...
One major challenge for power and microelectronics system integration today is the assurance of reliability, very often mastered by a carefully tuned interplay of the still dissimilar materials that make up a package, first under optimized processing conditions, and then often under combined loading conditions. Therefore, not only during design but also during test and operation it would be desirable...
Miniaturization and increasing functional integration as the electronic industry drives push the development of feature sizes down to the nanometer range. Moreover, harsh operational conditions and new porous or nano-particle filled materials introduced on both chip and package level - low-k and ultra low-k materials in Back-end of line (BEoL) layers of advanced CMOS technologies, in particular -...
Miniaturization and increasing functional integration as the electronic industry drives force the development of feature sizes down to the nanometer range. Moreover, harsh environmental conditions and new porous or nano-particle filled materials introduced on both chip and package level - low-k and ultra low-k materials in back-end of line (BEoL) layers of advanced CMOS technologies, in particular...
The electronic industry drive for miniaturization and increasing functional integration forces the development of feature sizes down to the nanometer range. Moreover, harsh environmental conditions and new porous or nano-particle filled materials introduced on both chip and package level - low-k and ultra low-k ILD materials in back-end of line (BEoL) layers of advanced CMOS technologies, in particular...
Abstract form only given. Lifetime prediction for advanced packaging faces two challenges in the future: lifetime models for the nano-domain (material level) and consistent methodologies for a system approach. Either must incorporate a physics of failure based concept as well as simulative and experimental procedures to analyse failure mechanisms and describe them theoretically on different length...
Podaj zakres dat dla filtrowania wyświetlonych wyników. Możesz podać datę początkową, końcową lub obie daty. Daty możesz wpisać ręcznie lub wybrać za pomocą kalendarza.