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A full high-definition (full HD) video codec includes a high-performance stream processing unit to support multiple standards in mobile application processors. The unit performs at 40 Mbps when operated at a 162-MHz clock rate. Implemented in 65-nm CMOS technology, the proposed video codec consumes 176 mW in real-time decoding of H.264 full HD video.
A video-size-scalable H.264 high-profile CODEC including 19 specific CPUs for extensibility to multiple standards has been fabricated in 65 nm CMOS. With two parallel pipelines for macroblock processing, the CODEC consumed 256 mW in real-time encoding of full-HD (1080i) video at an operating frequency of 162 MHz. It represents a 38% reduction in power consumption per pixel compared with state-of-the-art...
We have developed an H.264/MPEG-4 dual video codec IP for mobile applications such as digital still cameras (DSCs), digital video cameras (DVCs), and mobile phones. The codec is capable of encoding and decoding HD-sized moving pictures (1280 pixels by 720 lines at 30 fps) in real-time at an operating frequency of 144 MHz, and SD-sized pictures at 54 MHz. We have implemented our original architecture...
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