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We describe the design of a fifth order opamp-RC filter in a 65 nm digital CMOS process. Designed for a WLAN receiver chain, the baseband filter has a bandwidth of 9 MHz and features extensive use of digital hardware to correct for analog imperfections and thereby relaxing area and power requirements. Measurements show a 24 dB adjacent channel attenuation and an out-of-band IIP3 of 33 dBm. The complete...
In this paper, a circuit augmentation technique for broadband modeling of component libraries, and tuning of multilayer, embedded RF passive circuits has been presented. The circuit augmentation technique is based on a circuit partitioning technique, modified nodal analysis and a linear optimization framework. The "physical" circuit augmentation algorithm that has been implemented in this...
Physical layout generation of RF embedded passive design is not an easy task since the response of a given layout is tightly coupled with the response of the individual components and the effect of interconnect parasitics. In this paper we propose a methodology for automatic layout generation of embedded passive RF circuits. We make use of circuit models to represent and optimize a given layout and...
The rapidly evolving telecommunications market has led to the need for advanced RF circuits. Complex multi-band/multi-mode RF designs require accurate prediction early in the design schedule and time-to-market pressures require that design iterations be kept to a minimum. This paper presents a layout-level, multi-domain DFM methodology and yield optimization technique for embedded RF circuits for...
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