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Field programmable gate arrays (FPGAs) are widely used in building Systems-on-Programmable-Chips (SOPCs) since they contain plenty of reconfigurable heterogeneous resources providing the facility to implement various intellectual property cores. However, with the shrinking device feature size and the increasing die area, nowadays FPGAs can be deeply affected by the errors induced by electromigration...
We selected to use embedded ARM chip as the main controller, DSP and FPGA as its coprocessor, then expanded them with necessary peripheral circuits to constitute an Automotive Anti-collision Control System. The system makes full use of advantages of the embedded chips in their respective areas. It makes the core ARM9 S3C2410, appropriately dispatches the obstacle vehicles detection module based on...
Domain-partition (DP) model is a general model for reliability maximization problem under given redundancy. In this paper, an improved DP model is used to formulate a reconfiguration computing based fault tolerant system which is self-repairable in case of failure, and is solved as a nonlinear planning problem. The assumptions made in previous work are relaxed. An improved algorithm is proposed to...
This paper presents the design of an automatic anti- collision system which composed by embedded FPGA, DSP and ARM. TMS320DM6437 DSP as the core of the system, and Spartan-3 FPGA, S3C2410 ARM9, EP1C3T144C6 FPGA is its best match. First, we designed FPGA + DSP 3 way video surveillance system and DSP + ARM + FPGA automatic warning and control system, then combined them together to complete the whole...
The problem of planning the overlaps of multiple alternative configurations is critical to maximize the reliability of a reconfigurable fault-tolerant system based on field programmable gate arrays. To address the problem, an unnecessary assumption made in previous work is removed and a second-order approximation domain-partition method is proposed. Experimental results on ITC99 benchmark circuits...
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