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This paper describes a large signal Silicon on Insulator (SOI) substrate modeling methodology for high power circuit applications such as RF Switches. It is shown that the use of a varactor in place of a linear capacitor representing the buried oxide (BOX) improves the harmonic predictions of the circuit. The new substrate model is validated against 2nd and 3rd harmonics of an RF SOI switch operating...
A single-pole double-throw novel switch device in 0.18 ??m SOI complementary metal-oxide semiconductor (CMOS) process is developed for 0.9 Ghz wireless GSM systems. The layout of the device is optimized keeping in mind the parameters of interest for the RF switch. A subcircuit model, with the standard surface potential (PSP) model as the intrinsic FET model along with the parasitic elements is built...
We report on the promise of dual channel materials using FinFETs for high-performance CMOS for sub 22 nm technology node. We demonstrate pFinFETs with all SiGe channel formed by Germanium condensation onto a Silicon-On-Insulator carrier wafer (SiGeOI) followed by cMOS processing. The devices exhibit 3.6X hole mobility enhancement over Silicon (100) while allowing for VTH control with single high-k...
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