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L\X-band Full Polarization Aperture Synthesis Microwave Radiometer (FPASMR) is a 2-D aperture synthesis radiometer which can measure the sea salinity and soil moisture. As a key component of FPASMR, the digital correlator has been introduced in this paper from three abstract: the system design, the hardware design and the test results of the demonstrator. The results demonstrate that the digital correlator...
FPGA has been used in many fields such as space, military, auto. It is the best choice of cipher protocol and artithmetic achievement. Its security has been a focus. In this paper, the authors design a Hardware Trojan of transmitting key information towards FPGA. It is important to realize the implement mechanism and raise the attention to IC security.
The Flash has been widely used in the data records in aerospace and aviation, because of its low power consumption, light-weight, anti-seismic etc. But with the accuracy of Earth observation equipment gradually improved, and its increasingly high rate of export data, the storage system on the recording equipment made high demands. Through the use of PCI Express interface, and parallelization and pipelining...
In this paper, we present an FPGA implementation of a low complexity affine projection (AP) adaptive filtering algorithm based on a novel low complexity recursive filtering technique and filter update that is incorporated in dichotomous coordinate descent iterations. This adaptive algorithm is simple for finite precision implementation, requires small chip resources, and exhibits numerical stability...
In this paper, we present an FPGA implementation of a dynamically regularized recursive least squares adaptive filtering algorithm based on dichotomous coordinate descent iterations. The algorithm is simple for finite precision implementation, requires small chip resources, and exhibits numerical stability. The proposed implementation allows significant increase in the weight update rate compared...
A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the dichotomous coordinate descent (DCD) algorithm. The DCD algorithm allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices...
Parallel implementation of the dichotomous coordinate descent (DCD) algorithm is proposed and analyzed. The DCD algorithm allows multiplication-free solution of the normal equations. The computational load of the algorithm is mainly due to "successful" iterations, when an iV-length auxiliary vector is updated, N being the problem size. The parallel design exploits the fact that elements...
Based on FPGA, a digit-serial FIR filter is implemented. According to the digit-serial algorithm, the digit-serial FIR filter is composed of foundational function modules including the digit-serial adder, the digit-serial multiplier and the delay circuit. Compared with the traditional method, the digit-serial FIR filter based on FPGA exhibits the advantages of high response speed and low hardware...
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