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A 10 Gb/s receiver, containing an adaptive equalizer, a clock and data recovery, and a de-multiplexer, is implemented in 0.13-mum CMOS. The chip is intended for long-haul optical fiber links where chromatic and polarization mode dispersions are reach-limiting factors. The equalization is performed by a continuous time filter and a two-tap decision feedback equalizer while automatic threshold and phase...
A 10Gbps receiver, containing an adaptive equalizer, a clock and data recovery (CDR), and a demultiplexer, is implemented in 0.13 mum CMOS. By compensating for optical dispersion, this chip recovers transmitted data after 200km of single-mode fiber at BER < 10-12 . Use of analog equalizer with digital adaptation garners total power dissipation of 950mW
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