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Designing of gate drivers for high voltage SiC power devices in medium voltage applications is challenging due to high dv/dt and di/dt at the switching instants. During short circuit fault, the device current rises with high di/dt, and eventually the device fails within few of micro seconds if not protected. Short circuit protection of power devices is an essential feature to improve reliability of...
SRAM is widely used cache memory in the world. Materialization of low power SRAM with highest stability is a need of the hour. As from many years the requirement of fast and low power devices are augmenting. In this paper, in first part described about stability analysis from ADM (extract from N-Curve). After that information about leakage power is given. One 8T SRAM circuit is proposed with low power...
Wide band gap devices offer significant advantages such as high power density, fast switching and high efficiency. It is important to understand the trade-off involved in switching loss, conduction loss and reverse conduction characteristics for power converter design. Switching characterisation is essential for understanding the behaviour of new enhancement mode Gallium Nitride (GaN) power transistors...
In this work, a low power dual edge triggered flip flop design using multi threshold CMOS is proposed. Proposed Flip-Flop (FF) has three new feature points. First point, the pulse generation control logic is designed with EXOR gate and inverter chain which reduces the complexity and extra switching in pulse generator circuit. Second point, signal feed through technique with some modification is devised...
The work highlights the benefits of one of the newly proposed TFET architecture with undoped drain. In this work the architecture has been analyzed with a stack of gate dielectric material (low-k beneath a high-k dielectric) and a heavily doped n+ pocket region between source and drain to further boost the on-state characteristics. The performance of this newly proposed architecture has been compared...
Over the past years, modular multilevel converters (MMC) have been widely researched as a preferred option among voltage source converters for HVDC transmission system. The converter presents modularity to generate high number of output voltage levels by simple series connection of modules, resulting in higher reliability and easy failure management/maintenance. Synthesis of near sinusoidal output...
In the present work, Low Power Conditional Pulse Control with Transmission Gate Flip-Flop (CPCTG-FF) design based on signal feed through scheme is proposed. The proposed design removes the long discharging path problem with intermediate nodes using the pulse generation control logic with transmission gate (which facilitates a faster discharge operation). Transmission gate and a NMOS are used to control...
This work reports the DC characteristics of dual gated large area graphene metal oxide semiconductor field effect transistor (MOSFET). The sheet charge density dependent quantum capacitance is obtained self-consistently with considering the impurities concentration of the gate oxide layer. The potential profile as well as sheet charge density of graphene channel is calculated. The C-V and I-V characteristics...
In a large-scale wireless sensor network, clustering sensor nodes around a few less-energy constrained gateways (also called cluster heads) has been considered as an effective means to achieve scalability and robustness of the networks. However, if some gateways are overburdened with a large number of sensor nodes, they can die quickly and as a result the network life time can be over within a short...
Short-channel effects play a major role for MOS scaling of gate length down and especially below 0.1μm or even less. In this paper, the detail review of different secondary effects and their solutions for delay & power estimation which are proposed by various researchers in the past decade are presented briefly. Different effects like Gate Direct Tunneling Current (GDTC), Gate-Induced Drain Leakage...
As we know in Mobile Ad hoc network our Nodes are highly mobile. They move around the Network. Due to this network topology and number of neighboring nodes in each node frequently change. Movement of nodes from one to another network also affect to the communication between them. As we know if nodes are within the range of each other they will work properly. But any of one node is not in the range...
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