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This article presents a router, called Rover II, for via-configurable structured ASIC with mixed standard cells and relocatable IPs. Rover II extends the work of Rover and incorporates a porting of NTHU-Route 2.0 and NCTU-GR global routers. Experimental results show that Rover II can successfully route a via-configurable structured ASIC with standard cells and IPs under different routing fabrics....
This paper presents a simple method for design and analysis of a via-configurable routing fabric formed by an array of routing fabric blocks (RFBs). The method simply probes into an RFB rather than resorts to full-chip routing to collect some statistics for a metric used to qualify the RFB. We find that the trade-off between wire length and via count is a good metric. This metric has been validated...
In this paper, we propose a clock routing algorithm for structured ASICs using predefined yet via-configurable metal wires. Our algorithm has many distinct features implemented to address the specific problems encountered by the tasks of creating tapping points and performing wire snaking. We also present an approach to merging two subtrees without exacerbating the skew of a merged tree. Experimental...
A structured ASIC has some arrays of pre-fabricated yet configurable logic blocks (CLBs) with/without a regular routing fabric. In this paper, we propose a standard cell like via-configurable logic block (VCLB). We design a 0.18 um standard cell library based on our VCLB and establish a design flow using as many commercial tools as possible. We also propose a method to evaluate the viability of a...
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