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In this paper, we demonstrate low junction leakage for devices fabricated at low temperature (≤ 650°C). This is explained by the reduced channel thickness of our device (6 nm). We show this through both experimental data and KMC simulations that enable to understand the origin of the leakage reduction.
We present the shortest and narrowest high-κ/metal gate n- and pFETs on compressively strained enriched SiGe On Insulator (c-SGOI) reported to date (LG=20nm; W=30nm; TSiGe=15nm). The range of active area widths in this work allows observing the transition from biaxial to uniaxial stress due to lateral elastic strain relaxation, and its benefit down to 20nm gate length on hole mobility and pFET performance...
Chemiresistors (CR) with thiolate-monolayer-protected gold nanoparticle (MPN) interfacial layers can provide sensitive detection of volatile organic compounds (VOCs). However, baseline resistances are high (~M-ohm) relative to the typical responses (~ohms), and baseline drifts can be large. These factors represent impediments to the implementation of CRs and CR arrays in microanalytical systems for...
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