The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Most texture compression schemes are not able to accurately represent the object edges, since the number of color candidates usually are not sufficient to reconstruct a smooth block. We propose a new hierarchical palette approach for the texture compression. The colors are chosen from palettes and sub-palettes in quad-tree without increasing bit rates. The experimental results show significant improvements...
A Lifting-based Discrete Wavelet Transform (DWT) is a time/frequency analysis conversion method that is often used in JPEG2000 image compression systems. Its filter bank has a dual-mode base function that consists of coefficients of 9/7 and 5/3. Generally, in the process of realizing Very Large Scale Integration (VLSI) architecture, there is a longer critical paths and increased cost of hardware,...
This paper proposed a speed controller design for a DC motor by using a FPGA chip and applies it on a wheeled robot. For the motor accelerating control, this paper proposed a hardware PI controller circuit module to achieve the accelerating control. On the motor decelerating control, this paper proposed a braked deceleration circuit module to improve the skid of tires when the wheel-type robot brakes...
In this paper, a Hardware/Software (HW/SW) co-design method of ant colony optimization (ACO) algorithm is proposed to implement on the FPGA chip. In this paper, the software is designed with C language and hardware is designed with Verilog hardware description language (HDL). The HW/SW co-design method is a technique based on a SOPC (System on a Programmable Chip). In this paper, the path selecting...
A number of shocking cyber-attacks have happened in recent years, and the damage they have caused has led to the emergence of cyber-security as a consideration when designing embedded systems. Software vulnerability and physical attack are the most severe threats the system face. This paper provides information about hardware designed to monitor potential intrusions and incidences of unauthorized...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.