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This paper presents a 24-GHz single-in differential-out (SIDO) CMOS low-noise amplifier (LNA) for wireless communication applications. The SIDO LNA utilizes a trifilar transformer inserted between the first and the second stages for the single-to-differential signal conversion. The LNA, fabricated in a 0.13 mum RF CMOS technology, exhibits a differential gain of 14.7 dB, a 3-dB bandwidth of 3.5 GHz...
In this paper, a power-efficient programmable gain amplifier (PGA) and a cyclic analog-to-digital converter (ADC) are developed for a satellite CMOS image sensor system. The cyclic ADC employs capacitor and opamp reuse techniques to reduce power consumption and occupied silicon area. Moreover, a power-efficient and wide-bandwidth telescopic cascode gain boosting amplifier with capacitive level shifters...
In this paper, the aim of this work is to design a V-band low-noise amplifier that is suitable for SoC and wireless communication systems. It achieves a peak gain of 11.7 dB while consuming 21.6 mW.
In this work, a characteristic observation method is proposed to reduce the test time for the INL and DNL testing of a pipelined A/D converter. The symmetrical and specific regular rules are concluded by analyzing the characteristic of a pipelined ADC. As a result, based on the specific rules, only a few code bin widths of specific codes should be measured to accomplish the accurate full-code INL/DNL...
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