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We would like to report our approaches to realize epitaxially grown source toward high drain current in III-V MISFET. One approach is an InP/InGaAs composite channel MISFET with regrown InGaAs source/drain. When gate length of 150 nm was fabricated, Id at Vd = 0.8 V was 0.8 A/mm and maximum gm was 0.38 S/mm at Vd = 0.5 V. The other approach is vertical FET. In case of vertical FET with dual gate,...
It is important for shrinking the mesa width of a channel region in a vertical InGaAs channel MISFET for carrying out high-speed operation and for obtaining a steep sub-threshold slope. Therefore, we introduced selective undercut etching after the dry etching of the mesa structure. In the fabricated device with 60-nm-long channel, the channel mesa width became 15 nm. The maximum drain current density...
An InP/InGaAs composite channel MOSFET with InGaAs source is fabricated, this InGaAs source is selectively regrown by metalorganic vapor phase epitaxy. The maximum drain current of MOSFET (at VD = VG = 3 V) is 360 mA/mm at room temperature with the Si-doped channel, 20-nm-thick SiO2 gate insulator and 2 mum channel length. However, the drain current of regrown MOSFET is smaller than MOSFET without...
An insulated gate was introduced in hot electron transistors, in which hot electrons are propagated only in the intrinsic region after extraction from a heterostructure launcher. Voltage gain is increased by improved fabrication process.
The emitter width of the hot electron transistor controlled by an insulated gate was reduced to 70 nm by an improved fabrication process. In a previous study, the observed output conductance was twofold higher than transconductance. In this study, the output conductance was reduced from 115 mS/mm to 20 mS/mm by the improved fabrication process and a clear current modulation was also confirmed.
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