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The paging mechanism is widely used in most modern systems to handle the virtual memory. Many page replacement algorithms have been proposed. Therefore, the cor-rectness and reliability of virtual memory management systems become very important. It is essential to formalize and verify the system in a formal way. In this paper, we model the virtual memory management system with MSVL, which is a parallel...
An optimized design of the SOFC integration system is put forward with a three-layer structure, which consists of data communication, data processing and Human-machine interaction. The key for the optimized design in the system is data communication and data processing. The data processing layer has designed real-tine database and backup function of history database. And here the massive data classification,...
In embedded systems, high-performance DSP needs to be performed not only with high-data throughput but also with low-power consumption. In this paper, we propose an effective scheduling framework, MARLS (Memory Access Reduction Loop Scheduling), to reduce memory accesses for DSP applications with loops. In the framework, we generate register operations to replace redundant load operations, and schedule...
In this paper, we propose an effective data pipelining technique, SPDP (scratch-pad data pipelining), for dynamic scratch-pad memory (SPM)management with DMA (Direct Memory Access). InSPDP, we group multiple iterations of a loop into a block for SPM allocation, and implement a data pipeline by overlapping the execution of CPU instructions and DMA operations. We have implemented our SPDP technique...
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