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Growing demand for more powerful yet smaller devices has resulted in continuous scaling of fabrication technologies. While this approach supports aggressive design specifications, it has resulted in tighter constraints for circuit designers who face yield losses in analog / RF ICs due to process variation. Over the last few years, several statistical techniques have, therefore, been proposed to counter...
Towards meeting the continued demand for higher performance in analog/RF ICs, the semiconductor industry has resorted to aggressive design styles. In conjunction with the increased variation of modern processes, aggressive design jeopardizes yield and, by extension, profitability of the design. In an effort to facilitate aggressive high-performance design without compromising production yield, modern...
As the semiconductor industry continues scaling devices toward smaller process nodes, maintaining acceptable yields despite process variations has become increasingly challenging. Analog and RF circuits are particularly sensitive to process variations. This article discusses the challenges of cost-effective postfabrication performance calibration in such analog and RF devices and introduces a single-test,...
A stand-alone built-in self-test architecture mainly consists of three components: a stimulus generator, measurement acquisition sensors, and a measurement processing mechanism to draw out a straightforward Go/No-Go test decision. In this paper, we discuss the design of a neural network circuit to perform the measurement processing step. In essence, the neural network implements a non-linear classifier...
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