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A high precision and high resolution time-to-digital converter (TDC) based on multichain measurements averaging method is implemented in a 40 nm fabrication process Virtex-6 FPGA. The results of the detailed theoretical analysis and the simulation with the MATLAB tool based on a complete TDC module show that the resolution limitation determined by the intrinsic cell delay of plain tapped-delay chain...
A high precision and high resolution time-to-digital converter (TDC) implemented in a 40 nm fabrication process Virtex-6 FPGA is presented in this paper. The multi-chain measurements averaging architecture is used to overcome the resolution limitation determined by intrinsic cell delay of the plain single tapped-delay chain. The resolution and precision are both improved with this architecture. In...
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