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DWT has been the main algorithm of image compression, such as in JPEG2000.This paper propose a VLSI structure to perform line-based DWT using lifting scheme. We use this mean to achieve 1D and 2D DWT, examination results show this structure is simple and efficient.
In JPEG2000, 9/7 and 5/3 filters are adopted to realize DWT algorithm. In this paper, we proposed a folded reconfigurable architecture which can be used to 9/7 or 5/3 filter. It is simple and can reduce hardware usage. Further, it is efficient to be used in 2D DWT.
Two dimensional discrete wavelet transform (2DDWT) has been adopted as a coding tool of JPEG 2000 image coding and MPEG-4 still texture coding. To make it suitable for real-time image processing applications, it is essential to develop custom VLSI chips for computation of 2D-DWT. A new high efficient architecture is proposed for 2D 1-level DWT, with the feature of original data is scanned by group...
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