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Stress migration (SM) and electromigration (EM) are key reliability concerns for advanced metallization in nanoscale CMOS technologies. In this paper, the interaction between these two mechanisms is studied in dual-damascene Cu/low-k interconnects. It is found that these mechanisms are not independent; EM failure time could be strongly affected by the presence of residual stress induced by SM, causing...
The effects of dielectric slots on Cu/Low-k interconnects reliability were studied. Dielectric slots were proven to be effective in suppressing stress-induced void failure but their impact on EM reliability was found to be minimal. Physical failure analysis and finite element simulations were used to explain the possible mechanisms associated to the different effects of dielectric slots on Cu/low-k...
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