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Operating Systems (OS) is a course in undergraduate computer science curricula to teach students concepts relating to the environment on which their applications run. In practice, OS software is very complicated, and the internal processes and mechanisms are often difficult for students to grasp, particularly those that still struggle with programming. Many OS courses are taught by describing high-level...
We developed a methodology to improve the cache behavior and overall performance of sparse linear algebra kernels used in graph analytics. Large scale graph processing typically has low performance because it cannot effectively use processor caches, resulting in high-latency for memory accesses. This is particularly true in a sparse linear algebra formulations of graph algorithms, which use well known...
In the recent trends the need for low power and less on-chip area is on high note for the portable devices. To cope up with the arising need, a new Magnitude Comparator is proposed with low power and less on-chip area for different range of lower supply voltages using Modified GDI technique implemented in 45nm process technology using CADENCE VIRTUSO. There is 95% and 67% reduction in power at lower...
Due to the shrinking transistor sizes, the density of ICs roughly doubles every year as predicted by Moore's law. These advancements in the VLSI integration densities towards the nano scale era, witnessed a paradigm shift from computation centric designs to communication centric designs incorporating very large number of simple cores. Plenty of traditional interconnect schemes like point to point,...
Innovative approaches for securing the computing systems have intense inference for our understanding of technological, societal, economical, and political phenomena in making guiding principles, policies, rules and security implementations. The model presented here is based on cooperative and collaborative multilateral relationship among the shared business community partners. The sole responsibility...
This paper reviews a VLSI architecture based on ‘Parallel Pipeline Projection Engine’ (PPPE) which is composed by Forward Radon Transform and Back-projection architecture. This PPPE architecture is modified by using the theory of two-dimensional Radon Transform. The novel architecture is primarily based on analytical relationship between the pixels on horizontal and vertical raster scan line and also...
In this paper, a modified VLSI architecture for two-dimensional Radon Transform has been presented. The proposed architecture is primarily based on the analytical relationship between the pixels on horizontal and vertical raster scan line and also between the projection angles. The proposed architecture is compared against the existing ‘Parallel Pipeline Projection Engine’ (PPPE) architecture. Implementation...
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