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This study documents the speeds of various SRAM buffer memories that are possible in a contemporary fast SiGe heterojunction bipolar transistor (HBT) BiCMOS process. An SRAM in a 0.13 µm HBT BiCMOS technology using current mode logic (CML)-style circuits serves as a basis for the discussion. This basic SRAM design features a CML decoder, CML word line driver, bipolar sense amplifier for achieving...
A 128Kbit BiCMOS SRAM with a typical access time of 125ps was developed with 0.13um IBM Silicon Germanium BiCMOS technology. The fast access time with moderate power dissipation has been achieved using following techniques: CML decoder, CML driver circuit, bipolar sense amplify. CMOS 6T memory cell is used to achieve the high packing density. The simulation demonstrates that this SRAM macro can achieve...
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