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Due to the high integration on vertical stacked layers, power/ground network design becomes one of the critical challenges in 3D IC design. With the leakage-thermal dependency, the increasing on-chip temperature in 3D designs has serious impact on IR drop due to the increased wire resistance and increased leakage current. Power/ground (P/G) TSVs can help to relieve the IR drop violation by vertically...
The three-dimensional (3D) integration circuit is a new technology with higher integration density and better performance than 2D ICs. To solve the critical thermal issue in 3D layout, we propose a force-directed floorplanning algorithm. This algorithm naturally integrates with the planning of thermal vias and reasonably allocates white space for inserting the thermal vias. It solves the problem of...
The three-dimensional (3D) integration circuit is a new technology with higher integration density. To solve the critical thermal issue in 3D layout, we propose a thermal-driven force-directed floorplanning algorithm. Based on the characteristic of the different stages of floorplanning, this algorithm applies different methods to calculate the thermal distribution to reach a tradeoff between time...
Conventional object matching algorithms based on Hausdorff distance mostly use edge position information to compute distances. In this paper we represent an edge point using its position and the strength of its gradient to define a 3D distance function. We propose a modified Hausdorff distance based on this 3D distance function, and investigate its application in object matching problems. Finally,...
Thermal crisis has been widely regarded by IC industry. High temperature heavily impacts on reliability, performance, cooling cost and power consumption of ICs. High temperature can be reduced by increasing area. However arbitrarily large area, namely high number of resources in high-level view, dramatically increases IC cost. This paper proposes a technique to achieve proper thermal-area tradeoff...
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