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According to the requirement of the navigation satellite in orbit power, limited hardware resources and the high real-time of spread spectrum communication, an efficient FFT based fast correlation detection design of high efficiency onboard is proposed. First, the navigation satellite spread spectrum signal acquisition is described, the existing methods are analyzed which require a lot of hardware...
Optical remote sensing satellite holds great potential for ship detection. However, it is challenging for real-time detection due to the relatively low resolution and complicated background. We propose a real-time on-board ship detection method based on statistical analysis and shape identification. First, Gaussian and median filter are used to reduce the periodical and pepper noise generated by the...
A two-dimensional temporal and spatial correlated lognormal clutter sequence generation method based on FPGA is proposed. This method solves the problem of long generation time generating the sequence based on the DSP, due to the higher sampling rates or long data, which is difficult to meet real-time requirements of the data generated‥ In this paper, based on FPGA, using a one-dimensional temporal...
Currently software defined radio (SDR) is implemented by using DSP only or by using DSP plus FPGA chip. For DSP processing speed of the bottleneck problem, a complete FPGA IF software radio implementation is proposed in this paper. Traditional solutions use only FPGA for digital up and down conversion, modulation and demodulation; design proposed in this paper based on the FPGA chip, a CPU processor...
An effective method is proposed for calculating the on-board real-time path planning of large-scale space redundant manipulators. Firstly, the 7-DOF manipulator kinematics model is described and analyzed, and the main computational process of path planning is presented. The homogeneous transformation matrices of various degrees of freedom are obtained through the telemetry joint angle, and is used...
An appropriate tool to generate real network traffic plays an important role in testing network system. Traditionally, such a tool relies on software solutions that copies data back and forth between different part of memory to capture or replay network traffic. In this paper, we propose an FPGA-centric approach using parallel logic, which can ensure high accuracy of time and high throughput. We first...
A parallel pipelined CORDIC-based matched filter coefficients weighted algorithm for frequency domain digital pulse compression (DPC) system is proposed. Unlike the conventional matched filter weighted methods based on look-up table, this design completes weighted process using circular mode CORDIC algorithm by controlling the input angle. The multiplication of the expansion factor is realized by...
In this paper, the architecture and the implementation of an efficient digital down converter (DDC) processor for wide band radar receiver are presented. This architecture of the processor is based on the sampling technique in which the sampling frequency is 4 times as high as the intermediate frequency and the use of half band filter architecture. It avoids ¾ the use of multiplications compared with...
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