The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The reversible logic circuits (RLC) are a sort of novel circuits which can avoid the information loss and energy dissipation by implementing the reversible logic operations. RLC prohibit the feedback and don't have the fan-out, so the synthesis methods of RLC are very different from the existing irreversible logic circuits. In this paper, evolutionary design techniques are applied to the synthesis...
The reversible logic synthesis is a multi-objective optimization problem with rigorous constraints such as prohibiting the feedback and fan-out, and the same number of inputs and outputs, so it is difficult to be solved by general synthesis methods. Moreover, the synthesis methods of reversible logic circuits are very different from that of existing irreversible logic circuits. To make improvements...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.