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This paper proposes a method to efficiently generate hardware from a large behavioral description by behavioral synthesis. For a program with functions which are executable in parallel, this proposed method determines an optimal behavioral partitioning which fully exploits the function-level parallelism with simultaneously minimizing the area in the datapath and control path. This partitioning problem...
Behavioral synthesis, which automatically synthesizes an RTL circuit from a sequential program, is one of promising technologies to improve the design productivity. However, behavioral synthesis has not become popular yet in industry since the quality of generated circuits is not satisfactory, especially in the synthesis from the large programs with a number of functions. This paper proposes a method...
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