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Design methodologies and tools based on the synchronous dataflow (SDF) model of computation have proven useful for rapid prototyping and implementation of digital signal processing (DSP) applications on multiprocessor systems. One significant problem that arises when mapping applications onto such embedded multiprocessors is the memory wall problem, which is becoming increasingly dominant in multiprocessor...
This paper presents a new reconfigurable and area- efficient architecture for symmetric FIR filters with powers-of-two (PT) coefficients (2PFIR filters). The proposed architecture is based on the general-purpose digital signal processor (DSP) architecture. The synthesis results show that the proposed architecture is more area-efficient than the normal architecture in terms of gate count, maintaining...
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