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A high-resolution all-digital duty-cycle corrector (ADDCC) with a novel pulse-width detector in cell-based design is presented. This work provides a wider acceptable duty-cycle range from 10% to 90% and a larger operation frequency range from 100MHz to 3.6GHz. We rely on an “Exponentially Segmented Binary Search” method for increasing the locking speed. Based on three types of...
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