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We introduce SCALER, a two-pronged strategy utilizing digital resources for refining intrinsic evolution of analog computational circuits. A Self-Scaling Genetic Algorithm is proposed to adapt solutions to computationally-tractable ranges in hardware-constrained analog reconfigurable fabrics. Differential Digital Correction is developed utilizing an error metric computed from the evolved analog circuit...
Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the cost of reduced accuracy for signal processing applications whereby constituent adder and multiplier circuits need not generate a precise output. Since the performance versus energy savings landscape is complex, we investigate the acceleration...
A quantitative stochastic design technique is developed for evolvable hardware systems with self-repairing, replaceable, or amorphous spare components. The model develops a metric of sustainability which is defined in terms of residual functionality achieved from pools of amorphous spares of dynamically configurable logic elements, after repeated failure and recovery cycles. At design-time the quantity...
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