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3D ultrasound, an emerging medical imaging technique that is presently only used in hospitals, has the potential to enable breakthrough telemedicine applications, provided that its cost and power dissipation can be minimized. In this paper, we present an FPGA architecture suitable for a portable medical 3D ultrasound device. We show an optimized design for the digital part of the imager, including...
In medical diagnosis, ultrasound (US) imaging is one of the most common, safe, and powerful techniques. Volumetric (3D) US is potentially very attractive, compared to 2D US, because it might enable telesonography - decoupling the local image acquisition, by an untrained person, and the diagnosis, by the trained sonographer, who can be remote. Unfortunately, current 3D systems are hospital-oriented,...
We present an efficient FPGA architecture suitable for a medical 3D ultrasound beamformer. We tackle the delay calculation bottleneck, which is the heart and the most critical part of the beamformer, by proposing a computationally efficient design that is able to perform volumetric real-time beamforming on a single-chip FPGA. The design has been demonstrated for a 32×32-channel receive probe, and...
In medical diagnosis, ultrasound (US) imaging is one of the most common, safe, and powerful techniques. Volumetric (3D) US imaging, an emerging technique, is even more attractive than standard 2D imaging, as it allows for imaging without the local presence of a trained sonographer finely positioning the probe. This would be particularly useful in rescue operations, remote areas and developing countries...
Cloud computing uses internet data centers to host applications and data storage. Cloud computing resources and services are offered to customers on pay-per-use model while the quality of the offered resources and services are defined using service level agreements also known as SLAs. Unfortunately, there is no standard mechanism to verify and assure that services delivered by the cloud provider satisfy...
This paper presents a low-power automatic supply multiplexer for reconfigurable step-up/down switching DC-DC converters. The multiplexer continuously compares the input and the output voltages. It then tracks and selects the higher voltage to be used for substrate biasing and supplying gate drivers. This reduces leakage current through substrate diodes and also reduces conduction losses of the driven...
This paper introduces the system architecture and implementation of a 10Gbps ADC-Based Equalizer for Serial I/O Receiver. The system consists of 2 main building blocks. The first is a 4-channel 4-bit flash analog-to-digital converter with 10 Gbps sampling speed which was implemented using a modified clocking scheme that improves the ADC accuracy and resolution without the need for digital calibration...
A novel 1-to- broadband “-wave” power divider/combiner with reflection cancellation is presented and demonstrated. The new -wave structure provides reflection cancellation and output port isolation with 1-to- (arbitrary ) signal splitting or -to-1 summing. It has low loss due to its use of low-impedance transmission lines and provides a relative bandwidth of 50%–200%. The concept is...
In this paper, TMR Sensors are applied to a fault-tolerant direct sensor to actuator (S2A) architecture for Ethernet-based Networked Control Systems (NCSs). The architecture is studied using switched Fast and Gigabit Ethernet. It is shown analytically and verified via OMNeT++ simulations that the architecture succeeds in meeting system end-to-end delay and strict zero packet loss (no over-delayed...
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